Mgr I, R&D (Location:- Bangalore)

Job Description:-

Responsible for leading a team of software developers working on logic synthesis product for FPGAs. Will be responsible for defining requirements, execution, tracking and customer interaction for various projects in technology mapping, logic and timing optimization area.

Looking for a person with B.Tech/M. Tech/PhD in CS/EE with around 10+ years of experience in EDA tool development in C/C++ (preferably in synthesis and optimization area). The person should have strong background in complex data structures, EDA algorithms. Should be good at digital logic design and Verilog/VHDL. Knowledge of FPGAs would be a big plus.

Interested candidates may kindly respond with the resumes at vishalka@synopsys.com