Job Description:-
+ Be responsible for circuit design, schematics, layouts, simulations, netlist extraction, LEF and related EDA models as required in Std Cell IP development
+ Responsible for physical design, development and verification of Standard Cells in various deep sub-micron technologies.
+ Design and implement scripts required to automate parts of the Std. Cell IP development flow
+ Be involved in all phases of Std Cell IP development, including project planning, problem identification, design specification, development, testing and product support
+ Exercise judgment within broadly defined practices and policies in selecting methods, techniques, and evaluation criteria for obtaining results
+ Develop state of the art solutions through technical contributions that lead to significant product differentiation
+ Sound understanding of various high performances, low power design techniques
+ Sound understanding of all the ASIC methodologies, flows.
REQUIRED QUALIFICATIONS:
+ B.Tech/M.Tech degree in Electonics Engineering, with excellence and consistency in academic records.
+ At least 3 years of related experience in circuit design and layouts for Standard Cell IP development
+ Excellent analytical, logical reasoning and problem-solving skills
+ Strong understanding of electrical circuit analysis and design and CMOS fundamentals
+ Strong understanding of digital electronics
+ Exposure to any programming or scripting language and UNIX/Linux OS
+ Knowledge of Timing/Power/Noise characterization methodologies, ECSM, CCS, NLDM models and working experience with any characterization tool, behavioral/timing/power EDA models, like Verilog, VHDL, Liberty, Physical design flow will be an added advantage
It is essential that the candidate has high integrity and a positive attitude. He/She will be a highly motivated, responsible, and dependable individual with self-drive and demonstrate a strong desire to learn and explore new technologies. It is essential that the individual has fast learning abilities. Initiative is required to drive solutions to problems when working in a team. He/She will be flexible to work on multiple tasks. The individual will be an excellent team player and is expected to have good oral and written communication skills and proficiency in English language.
Please drop me an email at vishalka@synopsys.com if interested.
+ Be responsible for circuit design, schematics, layouts, simulations, netlist extraction, LEF and related EDA models as required in Std Cell IP development
+ Responsible for physical design, development and verification of Standard Cells in various deep sub-micron technologies.
+ Design and implement scripts required to automate parts of the Std. Cell IP development flow
+ Be involved in all phases of Std Cell IP development, including project planning, problem identification, design specification, development, testing and product support
+ Exercise judgment within broadly defined practices and policies in selecting methods, techniques, and evaluation criteria for obtaining results
+ Develop state of the art solutions through technical contributions that lead to significant product differentiation
+ Sound understanding of various high performances, low power design techniques
+ Sound understanding of all the ASIC methodologies, flows.
REQUIRED QUALIFICATIONS:
+ B.Tech/M.Tech degree in Electonics Engineering, with excellence and consistency in academic records.
+ At least 3 years of related experience in circuit design and layouts for Standard Cell IP development
+ Excellent analytical, logical reasoning and problem-solving skills
+ Strong understanding of electrical circuit analysis and design and CMOS fundamentals
+ Strong understanding of digital electronics
+ Exposure to any programming or scripting language and UNIX/Linux OS
+ Knowledge of Timing/Power/Noise characterization methodologies, ECSM, CCS, NLDM models and working experience with any characterization tool, behavioral/timing/power EDA models, like Verilog, VHDL, Liberty, Physical design flow will be an added advantage
It is essential that the candidate has high integrity and a positive attitude. He/She will be a highly motivated, responsible, and dependable individual with self-drive and demonstrate a strong desire to learn and explore new technologies. It is essential that the individual has fast learning abilities. Initiative is required to drive solutions to problems when working in a team. He/She will be flexible to work on multiple tasks. The individual will be an excellent team player and is expected to have good oral and written communication skills and proficiency in English language.
Please drop me an email at vishalka@synopsys.com if interested.
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