R&D Engineer, Sr I (Location:- Bangalore)

Job Description:

Responsible for development (implementation & verification) of Verification IP. Expected to be proficient in programming and software development. Expected to follow good coding practices. Given the feature requirement, will work to define functional specification, design specification, implementation & verification of the feature. Expected to be good at problem solving and debugging. Would work in a multi-site environment, with teams across time zones. May need some interaction with applications engineering teams, and customers, on need basis. Expected to have good communication skills.

Requirements:

Must have BS in CS/EE with at least 6+ years of relevant experience or MS with at least 4+ years of relevant experience in one or more of the following areas:

· Essential knowledge of HVL/HDVL like OpenVera, e, SystemVerilog

· Familiarity with at least one industry standard verification methodology like RVM, VMM, OVM, UVM, etc. and development experience of VIP will be an added advantage.

· Strong in Object Oriented Programming concepts

· Familiarity with development of verification strategy, test plan, coverage, verification environment

· Familiarity with any one industry popular simulator tools like VCS, MTI, NC

· Knowledge of HDLs like Verilog/VHDL will be an added advantage

Knowledge of AMBA domain will be of critical  advantage

Interested candidates can email their resumes to vishalka@synopsys.com