R&D Engineer, Sr I
Job Description and Requirements
Responsible for designing, developing, troubleshooting, or debugging software programs in the area of logic synthesis for FPGAs.
Looking for a person with B. Tech/M. Tech. in CS/EE with around 5+ years of experience in development of logic synthesis software. The person should have strong background in programming in C/C++, data structures and algorithms. Should be familiar with digital logic design and Verilog/VHDL.
Knowledge about FPGAs would be a big plus
Interested candidates may kindly respond with the resumes at vishalka@synopsys.com
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